Fixed typo in TargetConfigs.scala Chipyard Mixins authored by Farzad Fatollahi-Fard's avatar Farzad Fatollahi-Fard
--- ---
title: BXE FireSim Documentation - Building Hardware title: BXE FireSim Documentation - Building Hardware
version: v2.2.0 version: v2.2.0
firesim: firesim:
version: main version: main
url: https://github.com/firesim/firesim/tree/c301eb5 url: 'https://github.com/firesim/firesim/tree/c301eb5'
docs-url: https://docs.fires.im/en/main/Getting-Started-Guides/On-Premises-FPGA-Getting-Started/Building-a-FireSim-Bitstream/Xilinx-Alveo-U250.html docs-url: >-
chipyard: https://docs.fires.im/en/main/Getting-Started-Guides/On-Premises-FPGA-Getting-Started/Building-a-FireSim-Bitstream/Xilinx-Alveo-U250.html
version: main chipyard:
url: https://github.com/ucb-bar/chipyard/tree/85d2620 version: main
doc-url: https://chipyard.readthedocs.io/en/main/ url: 'https://github.com/ucb-bar/chipyard/tree/85d2620'
aro-cn: D2021-2106030006 doc-url: 'https://chipyard.readthedocs.io/en/main/'
--- aro-cn: D2021-2106030006
---
# ![BXE FireSim](https://socks.lbl.gov/cag/bxe/-/raw/main/assets/bxe.png){height=24px} BXE FireSim - Building Custom Hardware
# ![BXE FireSim](https://socks.lbl.gov/cag/bxe/-/raw/main/assets/bxe.png){height=24px} BXE FireSim - Building Custom Hardware
This guide will show you how to change FireSim to build a dual-core Rocket RISC-V core. You can use this guide to modify Chipyard[^2] to build your custom architectures.
This guide will show you how to change FireSim to build a dual-core Rocket RISC-V core. You can use this guide to modify Chipyard[^2] to build your custom architectures.
This work was funded by the IARPA AGILE Program. [^1]
This work was funded by the IARPA AGILE Program. [^1]
[[_TOC_]]
[[_TOC_]]
# Building a Dual-Core Rocket
# Building a Dual-Core Rocket
In this example, we will be modifying FireSim to generate a dual-core RISC-V Rocket Core (`alveo_u250_firesim_rocket_dualcore_nic`) and booting it up on the attached FPGA. Generating bitstreams for the Alveo U250 can take a **few hours** to complete, so it's recommended to do your work in a [persistent session](home#opening-a-persistent-session-on-bxe-firesim-nodes).
In this example, we will be modifying FireSim to generate a dual-core RISC-V Rocket Core (`alveo_u250_firesim_rocket_dualcore_nic`) and booting it up on the attached FPGA. Generating bitstreams for the Alveo U250 can take a **few hours** to complete, so it's recommended to do your work in a [persistent session](home#opening-a-persistent-session-on-bxe-firesim-nodes).
## Modifying FireSim Configuration Files
FireSim has two `.yaml` files that describes the designs available to build, and well as where to build new designs. ## Modifying FireSim Configuration Files
FireSim has two `.yaml` files that describes the designs available to build, and well as where to build new designs.
Both of these files can be found in `$FIRESIM_ROOT/deploy`. Examples of unmodified FireSim configuration files can be found in `$FIRESIM_ROOT/deploy/sample-backup-configs`.
Both of these files can be found in `$FIRESIM_ROOT/deploy`. Examples of unmodified FireSim configuration files can be found in `$FIRESIM_ROOT/deploy/sample-backup-configs`.
### `$FIRESIM_ROOT/deploy/config_build.yaml`
This files configures the build environment for FireSim. This tells the tools where to build designs, what base shell to use, and what designs to build. ### `$FIRESIM_ROOT/deploy/config_build.yaml`
This files configures the build environment for FireSim. This tells the tools where to build designs, what base shell to use, and what designs to build.
First, we'll tell FireSim where to build our designs. Edit the `build-farm` section to resemble the following:
First, we'll tell FireSim where to build our designs. Edit the `build-farm` section to resemble the following:
```yaml
build_farm: ```yaml
base_recipe: build-farm-recipes/externally_provisioned.yaml build_farm:
recipe_arg_overrides: base_recipe: build-farm-recipes/externally_provisioned.yaml
# REQUIRED: (replace this) default location of build directory on build host. recipe_arg_overrides:
default_build_dir: /home/bxeuser/FIRESIM_BUILD_DIR # REQUIRED: (replace this) default location of build directory on build host.
# REQUIRED: List of IP addresses (or "localhost"). Each can have an OPTIONAL default_build_dir: /home/bxeuser/FIRESIM_BUILD_DIR
# argument, called "override_build_dir", specifying to override the default # REQUIRED: List of IP addresses (or "localhost"). Each can have an OPTIONAL
# build directory. # argument, called "override_build_dir", specifying to override the default
# # build directory.
# Ex: #
# build_farm_hosts: # Ex:
# # use localhost and don't override the default build dir # build_farm_hosts:
# - localhost # # use localhost and don't override the default build dir
# # use other IP address (don't override default build dir) # - localhost
# - "111.111.1.111" # # use other IP address (don't override default build dir)
# # use other IP address (override default build dir for this build host) # - "111.111.1.111"
# - "222.222.2.222": # # use other IP address (override default build dir for this build host)
# override_build_dir: /scratch/specific-build-host-build-dir # - "222.222.2.222":
build_farm_hosts: # override_build_dir: /scratch/specific-build-host-build-dir
- localhost build_farm_hosts:
- localhost
```
```
This tells FireSim to place all of the build files in `/home/bxeuser/firesim/FIRESIM_BUILD_DIR` on the run farm hosts. You can change this to any location you'd like.
This tells FireSim to place all of the build files in `/home/bxeuser/firesim/FIRESIM_BUILD_DIR` on the run farm hosts. You can change this to any location you'd like.
Next we need to tell FireSim which designs we would like to build. `builds_to_run` lists all of the recipes that we'd like FireSim to build from scratch. Since we only want FireSim to build a `alveo_u250_firesim_rocket_dualcore_nic` recipe, we make sure we add it and comment out the other recipes. Here's what the `builds_to_run` section should look like:
Next we need to tell FireSim which designs we would like to build. `builds_to_run` lists all of the recipes that we'd like FireSim to build from scratch. Since we only want FireSim to build a `alveo_u250_firesim_rocket_dualcore_nic` recipe, we make sure we add it and comment out the other recipes. Here's what the `builds_to_run` section should look like:
```yaml
builds_to_run: ```yaml
# Configs for BXE builds_to_run:
- alveo_u250_firesim_rocket_dualcore_nic # Configs for BXE
``` - alveo_u250_firesim_rocket_dualcore_nic
```
In summation, your `$FIRESIM_ROOT/deploy/config_build.yaml` should look like this:
In summation, your `$FIRESIM_ROOT/deploy/config_build.yaml` should look like this:
```yaml
# Build-time build design / AGFI configuration for the FireSim Simulation Manager ```yaml
# See https://docs.fires.im/en/stable/Advanced-Usage/Manager/Manager-Configuration-Files.html for documentation of all of these params. # Build-time build design / AGFI configuration for the FireSim Simulation Manager
# See https://docs.fires.im/en/stable/Advanced-Usage/Manager/Manager-Configuration-Files.html for documentation of all of these params.
# this refers to build farms defined in config_build_farm.yaml
# this refers to build farms defined in config_build_farm.yaml # this refers to build farms defined in config_build_farm.yaml
build_farm: # this refers to build farms defined in config_build_farm.yaml
base_recipe: build-farm-recipes/externally_provisioned.yaml build_farm:
recipe_arg_overrides: base_recipe: build-farm-recipes/externally_provisioned.yaml
# REQUIRED: (replace this) default location of build directory on build host. recipe_arg_overrides:
default_build_dir: /home/bxeuser/FIRESIM_BUILD_DIR # REQUIRED: (replace this) default location of build directory on build host.
# REQUIRED: List of IP addresses (or "localhost"). Each can have an OPTIONAL default_build_dir: /home/bxeuser/FIRESIM_BUILD_DIR
# argument, called "override_build_dir", specifying to override the default # REQUIRED: List of IP addresses (or "localhost"). Each can have an OPTIONAL
# build directory. # argument, called "override_build_dir", specifying to override the default
# # build directory.
# Ex: #
# build_farm_hosts: # Ex:
# # use localhost and don't override the default build dir # build_farm_hosts:
# - localhost # # use localhost and don't override the default build dir
# # use other IP address (don't override default build dir) # - localhost
# - "111.111.1.111" # # use other IP address (don't override default build dir)
# # use other IP address (override default build dir for this build host) # - "111.111.1.111"
# - "222.222.2.222": # # use other IP address (override default build dir for this build host)
# override_build_dir: /scratch/specific-build-host-build-dir # - "222.222.2.222":
build_farm_hosts: # override_build_dir: /scratch/specific-build-host-build-dir
- localhost build_farm_hosts:
- localhost
builds_to_run:
# this section references builds defined in config_build_recipes.yaml builds_to_run:
# if you add a build here, it will be built when you run buildbitstream # this section references builds defined in config_build_recipes.yaml
# if you add a build here, it will be built when you run buildbitstream
# Configs for BXE
- alveo_u250_firesim_rocket_dualcore_nic # Configs for BXE
- alveo_u250_firesim_rocket_dualcore_nic
# Unnetworked designs use a three-domain configuration
# Tiles: 1000 MHz # Unnetworked designs use a three-domain configuration
# <Rational Crossing> # Tiles: 1000 MHz
# Uncore: 500 MHz # <Rational Crossing>
# <Async Crossing> # Uncore: 500 MHz
# DRAM : 1000 MHz # <Async Crossing>
# - firesim_rocket_quadcore_no_nic_l2_llc4mb_ddr3 # DRAM : 1000 MHz
# - firesim_boom_singlecore_no_nic_l2_llc4mb_ddr3 # - firesim_rocket_quadcore_no_nic_l2_llc4mb_ddr3
# - firesim_boom_singlecore_no_nic_l2_llc4mb_ddr3
# All NIC-based designs use the legacy FireSim frequency selection, with the
# tiles and uncore running at 3.2 GHz to sustain 200Gb theoretical NIC BW # All NIC-based designs use the legacy FireSim frequency selection, with the
# - firesim_supernode_rocket_singlecore_nic_l2_lbp # tiles and uncore running at 3.2 GHz to sustain 200Gb theoretical NIC BW
# - firesim_rocket_quadcore_nic_l2_llc4mb_ddr3 # - firesim_supernode_rocket_singlecore_nic_l2_lbp
# - firesim_boom_singlecore_nic_l2_llc4mb_ddr3 # - firesim_rocket_quadcore_nic_l2_llc4mb_ddr3
# - firesim_boom_singlecore_nic_l2_llc4mb_ddr3
# Configs for tutorials
# - firesim_rocket_singlecore_no_nic_l2_lbp # Configs for tutorials
# - firesim_rocket_singlecore_sha3_nic_l2_llc4mb_ddr3 # - firesim_rocket_singlecore_no_nic_l2_lbp
# - firesim_rocket_singlecore_sha3_no_nic_l2_llc4mb_ddr3 # - firesim_rocket_singlecore_sha3_nic_l2_llc4mb_ddr3
# - firesim_rocket_singlecore_sha3_no_nic_l2_llc4mb_ddr3_printf # - firesim_rocket_singlecore_sha3_no_nic_l2_llc4mb_ddr3
# - firesim_gemmini_rocket_singlecore_no_nic # - firesim_rocket_singlecore_sha3_no_nic_l2_llc4mb_ddr3_printf
# - firesim_gemmini_printf_rocket_singlecore_no_nic # - firesim_gemmini_rocket_singlecore_no_nic
# - firesim_gemmini_printf_rocket_singlecore_no_nic
# Configs for Vitis/XRT
# - vitis_firesim_rocket_singlecore_no_nic # Configs for Vitis/XRT
# - vitis_firesim_rocket_singlecore_no_nic
# Config for RHSResearch Nitefury II
# - nitefury_firesim_rocket_singlecore_no_nic # Config for RHSResearch Nitefury II
# - nitefury_firesim_rocket_singlecore_no_nic
# Configs for Xilinx Alveo U250/U280
# - alveo_u250_firesim_rocket_singlecore_no_nic # Configs for Xilinx Alveo U250/U280
# - alveo_u250_firesim_gemmini_rocket_singlecore_no_nic # - alveo_u250_firesim_rocket_singlecore_no_nic
# - alveo_u200_firesim_rocket_singlecore_no_nic # - alveo_u250_firesim_gemmini_rocket_singlecore_no_nic
# - alveo_u280_firesim_rocket_singlecore_no_nic # - alveo_u200_firesim_rocket_singlecore_no_nic
# - alveo_u280_firesim_rocket_singlecore_no_nic
# Config for Xilinx VCU118
# - xilinx_vcu118_firesim_rocket_singlecore_4GB_no_nic # Config for Xilinx VCU118
# - xilinx_vcu118_firesim_rocket_singlecore_4GB_no_nic
agfis_to_share:
- firesim_rocket_quadcore_nic_l2_llc4mb_ddr3 agfis_to_share:
- firesim_rocket_quadcore_no_nic_l2_llc4mb_ddr3 - firesim_rocket_quadcore_nic_l2_llc4mb_ddr3
- firesim_boom_singlecore_no_nic_l2_llc4mb_ddr3 - firesim_rocket_quadcore_no_nic_l2_llc4mb_ddr3
- firesim_boom_singlecore_nic_l2_llc4mb_ddr3 - firesim_boom_singlecore_no_nic_l2_llc4mb_ddr3
- firesim_boom_singlecore_nic_l2_llc4mb_ddr3
- firesim_supernode_rocket_singlecore_nic_l2_lbp
- firesim_supernode_rocket_singlecore_nic_l2_lbp
# Configs for tutorials
# - firesim_rocket_singlecore_no_nic_l2_lbp # Configs for tutorials
# - firesim_rocket_singlecore_sha3_nic_l2_llc4mb_ddr3 # - firesim_rocket_singlecore_no_nic_l2_lbp
# - firesim_rocket_singlecore_sha3_no_nic_l2_llc4mb_ddr3 # - firesim_rocket_singlecore_sha3_nic_l2_llc4mb_ddr3
# - firesim_rocket_singlecore_sha3_no_nic_l2_llc4mb_ddr3_printf # - firesim_rocket_singlecore_sha3_no_nic_l2_llc4mb_ddr3
# - firesim_rocket_singlecore_sha3_no_nic_l2_llc4mb_ddr3_printf
share_with_accounts:
# To share with a specific user: share_with_accounts:
somebodysname: 123456789012 # To share with a specific user:
# To share publicly: somebodysname: 123456789012
# public: public # To share publicly:
``` # public: public
```
### `$FIRESIM_ROOT/deploy/config_build_recipes.yaml`
Next we need add our `alveo_u250_firesim_rocket_dualcore_nic` to the list of FireSim hardware recipes. The recipe is what FireSim uses to tell Chipyard what to design to build, as well as any FPGA specific parameters. The top of the file has schema for all of the parameters available. ### `$FIRESIM_ROOT/deploy/config_build_recipes.yaml`
Next we need add our `alveo_u250_firesim_rocket_dualcore_nic` to the list of FireSim hardware recipes. The recipe is what FireSim uses to tell Chipyard what to design to build, as well as any FPGA specific parameters. The top of the file has schema for all of the parameters available.
Add the following to the end of `$FIRESIM_ROOT/deploy/config_build_recipes.yaml`:
Add the following to the end of `$FIRESIM_ROOT/deploy/config_build_recipes.yaml`:
```yaml
# BXE FireSim Dual-Core Rocket Recipe ```yaml
alveo_u250_firesim_rocket_dualcore_nic: # BXE FireSim Dual-Core Rocket Recipe
PLATFORM: xilinx_alveo_u250 alveo_u250_firesim_rocket_dualcore_nic:
TARGET_PROJECT: firesim PLATFORM: xilinx_alveo_u250
DESIGN: FireSim TARGET_PROJECT: firesim
TARGET_CONFIG: WithNIC_FireSimDualRocketConfig DESIGN: FireSim
PLATFORM_CONFIG: BaseXilinxAlveoU250Config TARGET_CONFIG: WithNIC_FireSimDualRocketConfig
deploy_quintuplet: null PLATFORM_CONFIG: BaseXilinxAlveoU250Config
platform_config_args: deploy_quintuplet: null
fpga_frequency: 60 platform_config_args:
build_strategy: TIMING fpga_frequency: 60
post_build_hook: null build_strategy: TIMING
metasim_customruntimeconfig: null post_build_hook: null
bit_builder_recipe: bit-builder-recipes/xilinx_alveo_u250.yaml metasim_customruntimeconfig: null
``` bit_builder_recipe: bit-builder-recipes/xilinx_alveo_u250.yaml
```
We have now completed configuring FireSim. The `TARGET_CONFIG` section is the specific design in Chipyard we'd like to build. However, this design doesn't exist in Chipyard...
We have now completed configuring FireSim. The `TARGET_CONFIG` section is the specific design in Chipyard we'd like to build. However, this design doesn't exist in Chipyard...
## Creating a Design with Chipyard Mixins
Chipyard allows us to use their library of standard architecture and hardware components to build designs. These are called _Mixins_, and the list of components is out of scope for this tutorial. For now, we'll just use these to design a dual-core Rocket core. ## Creating a Design with Chipyard Mixins
Chipyard allows us to use their library of standard architecture and hardware components to build designs. These are called _Mixins_, and the list of components is out of scope for this tutorial. For now, we'll just use these to design a dual-core Rocket core.
Let's add our design to the list of designs available to FireSim. Open `$CHIPYARD_ROOT/generators/firechip/src/main/scala/TargetConfigs.scala` and add the following to the end of the file:
Let's add our design to the list of designs available to FireSim. Open `$CHIPYARD_ROOT/generators/firechip/chip/src/main/scala/TargetConfigs.scala` and add the following to the end of the file:
```scala
// BXE FireSim Dual-Core Rocket ```scala
class FireSimDualRocketConfig extends Config( // BXE FireSim Dual-Core Rocket
new WithDefaultFireSimBridges ++ class FireSimDualRocketConfig extends Config(
new WithDefaultMemModel ++ new WithDefaultFireSimBridges ++
new WithFireSimConfigTweaks ++ new WithDefaultMemModel ++
new freechips.rocketchip.subsystem.WithNBigCores(2) ++ new WithFireSimConfigTweaks ++
new chipyard.config.AbstractConfig) new freechips.rocketchip.subsystem.WithNBigCores(2) ++
``` new chipyard.config.AbstractConfig)
```
And that's it! We're ready to build our design!
And that's it! We're ready to build our design!
## Generating a Bitstream
With the FireSim build environment and Chipyard design configured, we're ready to launch the build. With FireSim loaded into our environment (`source sourceme-manager.sh --skip-ssh-setup`), we can launch a build. ## Generating a Bitstream
With the FireSim build environment and Chipyard design configured, we're ready to launch the build. With FireSim loaded into our environment (`source sourceme-manager.sh --skip-ssh-setup`), we can launch a build.
```shell
cd $FIRESIM_ROOT ```shell
# source sourceme-manager.sh --skip-ssh-setup cd $FIRESIM_ROOT
firesim buildbitstream # source sourceme-manager.sh --skip-ssh-setup
``` firesim buildbitstream
```
As stated before, this may take **MANY HOURS** to complete. Grab yourself a cup of your favorite beverage and let the machine build. You should see the following successful build message when done:
As stated before, this may take **MANY HOURS** to complete. Grab yourself a cup of your favorite beverage and let the machine build. You should see the following successful build message when done:
```
[localhost] out: ```
xilinx_alveo_u250/ [localhost] out:
xilinx_alveo_u250/metadata xilinx_alveo_u250/
xilinx_alveo_u250/firesim.bit xilinx_alveo_u250/metadata
xilinx_alveo_u250/firesim.mcs xilinx_alveo_u250/firesim.bit
FireSim FPGA Build Completed xilinx_alveo_u250/firesim.mcs
Your bitstream has been created! FireSim FPGA Build Completed
Add Your bitstream has been created!
Add
alveo_u250_firesim_rocket_dualcore_nic:
bitstream_tar: file:///home/bxeuser/firesim/deploy/results-build/2024-07-17--17-33-00-alveo_u250_firesim_rocket_dualcore_nic/cl_xilinx_alveo_u250-firesim-FireSim-WithNIC-FireSimDualRocketConfig-BaseXilinxAlveoU250Config/firesim.tar.gz alveo_u250_firesim_rocket_dualcore_nic:
deploy_quintuplet_override: null bitstream_tar: file:///home/bxeuser/firesim/deploy/results-build/2024-07-17--17-33-00-alveo_u250_firesim_rocket_dualcore_nic/cl_xilinx_alveo_u250-firesim-FireSim-WithNIC-FireSimDualRocketConfig-BaseXilinxAlveoU250Config/firesim.tar.gz
custom_runtime_config: null deploy_quintuplet_override: null
custom_runtime_config: null
to your config_hwdb.yaml to use this hardware configuration.
Build complete! Xilinx Alveo xilinx_alveo_u250 bitstream ready. See /home/bxeuser/firesim/deploy/built-hwdb-entries/alveo_u250_firesim_rocket_dualcore_nic. to your config_hwdb.yaml to use this hardware configuration.
The full log of this run is: Build complete! Xilinx Alveo xilinx_alveo_u250 bitstream ready. See /home/bxeuser/firesim/deploy/built-hwdb-entries/alveo_u250_firesim_rocket_dualcore_nic.
/home/bxeuser/firesim/deploy/logs/2024-07-17--17-33-00-buildbitstream-3P5LQGXVOH0DNATS.log The full log of this run is:
``` /home/bxeuser/firesim/deploy/logs/2024-07-17--17-33-00-buildbitstream-3P5LQGXVOH0DNATS.log
```
# Running a Custom Design
Now that the build is complete, we need to tell FireSim that this design is available to be run. We'll add `alveo_u250_firesim_rocket_dualcore_nic` to FireSim's hardware database, then configure the simulation to use the new design. # Running a Custom Design
Now that the build is complete, we need to tell FireSim that this design is available to be run. We'll add `alveo_u250_firesim_rocket_dualcore_nic` to FireSim's hardware database, then configure the simulation to use the new design.
## `$FIRESIM_ROOT/deploy/config_hwdb.yaml`
Using the path generated in the build step, we add an entry to the hardware database. Add the following to the end of the file: ## `$FIRESIM_ROOT/deploy/config_hwdb.yaml`
Using the path generated in the build step, we add an entry to the hardware database. Add the following to the end of the file:
```yaml
alveo_u250_firesim_rocket_dualcore_nic: ```yaml
bitstream_tar: file:///home/bxeuser/firesim/deploy/results-build/2024-07-17--17-33-00-alveo_u250_firesim_rocket_dualcore_nic/cl_xilinx_alveo_u250-firesim-FireSim-WithNIC-FireSimDualRocketConfig-BaseXilinxAlveoU250Config/firesim.tar.gz alveo_u250_firesim_rocket_dualcore_nic:
deploy_quintuplet_override: null bitstream_tar: file:///home/bxeuser/firesim/deploy/results-build/2024-07-17--17-33-00-alveo_u250_firesim_rocket_dualcore_nic/cl_xilinx_alveo_u250-firesim-FireSim-WithNIC-FireSimDualRocketConfig-BaseXilinxAlveoU250Config/firesim.tar.gz
custom_runtime_config: null deploy_quintuplet_override: null
``` custom_runtime_config: null
```
## `$FIRESIM_ROOT/deploy/config_runtime.yaml`
Now we're ready to deploy this design in the simulation. We modify this file to tell FireSim what the target design we're going to simulate. In the `target_config` section, change the `default_hw_config` to point to our new design, `alveo_u250_firesim_rocket_dualcore_nic`. It should resemble this: ## `$FIRESIM_ROOT/deploy/config_runtime.yaml`
Now we're ready to deploy this design in the simulation. We modify this file to tell FireSim what the target design we're going to simulate. In the `target_config` section, change the `default_hw_config` to point to our new design, `alveo_u250_firesim_rocket_dualcore_nic`. It should resemble this:
```yaml
target_config: ```yaml
topology: no_net_config target_config:
no_net_num_nodes: 1 topology: no_net_config
link_latency: 6405 no_net_num_nodes: 1
switching_latency: 10 link_latency: 6405
net_bandwidth: 200 switching_latency: 10
profile_interval: -1 net_bandwidth: 200
default_hw_config: alveo_u250_firesim_rocket_dualcore_nic profile_interval: -1
plusarg_passthrough: "" default_hw_config: alveo_u250_firesim_rocket_dualcore_nic
``` plusarg_passthrough: ""
```
## Running the Simulation
We can now run the design and boot Linux on this design. Following the tutorial from before: ## Running the Simulation
We can now run the design and boot Linux on this design. Following the tutorial from before:
```shell
cd $FIRESIM_ROOT ```shell
firesim infrasetup -a ${CY_DIR}/sims/firesim-staging/sample_config_hwdb.yaml -r ${CY_DIR}/sims/firesim-staging/sample_config_build_recipes.yaml cd $FIRESIM_ROOT
firesim runworkload -a ${CY_DIR}/sims/firesim-staging/sample_config_hwdb.yaml -r ${CY_DIR}/sims/firesim-staging/sample_config_build_recipes.yaml firesim infrasetup -a ${CY_DIR}/sims/firesim-staging/sample_config_hwdb.yaml -r ${CY_DIR}/sims/firesim-staging/sample_config_build_recipes.yaml
``` firesim runworkload -a ${CY_DIR}/sims/firesim-staging/sample_config_hwdb.yaml -r ${CY_DIR}/sims/firesim-staging/sample_config_build_recipes.yaml
```
In a separate window, log into the runner machine and run:
In a separate window, log into the runner machine and run:
```shell
screen -r fsim0 ```shell
``` screen -r fsim0
```
Wait for the console to boot, then verify multiple cores in the booted simulation:
Wait for the console to boot, then verify multiple cores in the booted simulation:
```shell
# cat /proc/cpuinfo ```shell
processor : 0 # cat /proc/cpuinfo
hart : 1 processor : 0
isa : rv64imafdckph hart : 1
mmu : sv39 isa : rv64imafdckph
uarch : sifive,rocket0 mmu : sv39
mvendorid : 0x0 uarch : sifive,rocket0
marchid : 0x1 mvendorid : 0x0
mimpid : 0x20181004 marchid : 0x1
mimpid : 0x20181004
processor : 1
hart : 0 processor : 1
isa : rv64imafdckph hart : 0
mmu : sv39 isa : rv64imafdckph
uarch : sifive,rocket0 mmu : sv39
mvendorid : 0x0 uarch : sifive,rocket0
marchid : 0x1 mvendorid : 0x0
mimpid : 0x20181004 marchid : 0x1
``` mimpid : 0x20181004
```
Congratulations! You have now simulated a dual-core RISC-V Rocket Core and booted Linux on an FPGA! :champagne: :champagne: :champagne:
Congratulations! You have now simulated a dual-core RISC-V Rocket Core and booted Linux on an FPGA! :champagne: :champagne: :champagne:
# Building BlackBox Designs
Chipyard is capable of wrapping custom Verilog designs into a [BlackBox](https://chipyard.readthedocs.io/en/main/Customization/Incorporating-Verilog-Blocks.html). This allows you to use your custom Verilog designs as accelerators attached to the core, or as the core itself. # Building BlackBox Designs
Chipyard is capable of wrapping custom Verilog designs into a [BlackBox](https://chipyard.readthedocs.io/en/main/Customization/Incorporating-Verilog-Blocks.html). This allows you to use your custom Verilog designs as accelerators attached to the core, or as the core itself.
FireSim has an example using a single-core [CVA6 RISC-V Verilog](https://chipyard.readthedocs.io/en/main/Generators/CVA6.html) implemenation.
FireSim has an example using a single-core [CVA6 RISC-V Verilog](https://chipyard.readthedocs.io/en/main/Generators/CVA6.html) implemenation.
---
---
[^1]: This research is based upon work supported by the Office of the Director of National Intelligence (ODNI), Intelligence Advanced Research Projects Activity (IARPA), through the Advanced Graphical Intelligence Logical Computing Environment (AGILE) research program, under Army Research Office (ARO) contract number D2021-2106030006. The views and conclusions contained herein are those of the authors and should not be interpreted as necessarily representing the official policies or endorsements, either expressed or implied, of the ODNI, IARPA, ARO, or the U.S. Government.
[^1]: This research is based upon work supported by the Office of the Director of National Intelligence (ODNI), Intelligence Advanced Research Projects Activity (IARPA), through the Advanced Graphical Intelligence Logical Computing Environment (AGILE) research program, under Army Research Office (ARO) contract number D2021-2106030006. The views and conclusions contained herein are those of the authors and should not be interpreted as necessarily representing the official policies or endorsements, either expressed or implied, of the ODNI, IARPA, ARO, or the U.S. Government.
[^2]: [Chipyard](https://chipyard.readthedocs.io/en/main/) is a framework for designing and evaluating full-system hardware using agile teams. It is composed of a collection of tools and libraries designed to provide an integration between open-source and commercial tools for the development of systems-on-chip.
[^2]: [Chipyard](https://chipyard.readthedocs.io/en/main/) is a framework for designing and evaluating full-system hardware using agile teams. It is composed of a collection of tools and libraries designed to provide an integration between open-source and commercial tools for the development of systems-on-chip.