# {height=24px} BXE FireSim - Building Custom Hardware
# {height=24px} BXE FireSim - Building Custom Hardware
This guide will show you how to change FireSim to build a dual-core Rocket RISC-V core. You can use this guide to modify Chipyard[^2] to build your custom architectures.
This guide will show you how to change FireSim to build a dual-core Rocket RISC-V core. You can use this guide to modify Chipyard[^2] to build your custom architectures.
This work was funded by the IARPA AGILE Program. [^1]
This work was funded by the IARPA AGILE Program. [^1]
[[_TOC_]]
[[_TOC_]]
# Building a Dual-Core Rocket
# Building a Dual-Core Rocket
In this example, we will be modifying FireSim to generate a dual-core RISC-V Rocket Core (`alveo_u250_firesim_rocket_dualcore_nic`) and booting it up on the attached FPGA. Generating bitstreams for the Alveo U250 can take a **few hours** to complete, so it's recommended to do your work in a [persistent session](home#opening-a-persistent-session-on-bxe-firesim-nodes).
In this example, we will be modifying FireSim to generate a dual-core RISC-V Rocket Core (`alveo_u250_firesim_rocket_dualcore_nic`) and booting it up on the attached FPGA. Generating bitstreams for the Alveo U250 can take a **few hours** to complete, so it's recommended to do your work in a [persistent session](home#opening-a-persistent-session-on-bxe-firesim-nodes).
## Modifying FireSim Configuration Files
FireSim has two `.yaml` files that describes the designs available to build, and well as where to build new designs.
## Modifying FireSim Configuration Files
FireSim has two `.yaml` files that describes the designs available to build, and well as where to build new designs.
Both of these files can be found in `$FIRESIM_ROOT/deploy`. Examples of unmodified FireSim configuration files can be found in `$FIRESIM_ROOT/deploy/sample-backup-configs`.
Both of these files can be found in `$FIRESIM_ROOT/deploy`. Examples of unmodified FireSim configuration files can be found in `$FIRESIM_ROOT/deploy/sample-backup-configs`.
### `$FIRESIM_ROOT/deploy/config_build.yaml`
This files configures the build environment for FireSim. This tells the tools where to build designs, what base shell to use, and what designs to build.
### `$FIRESIM_ROOT/deploy/config_build.yaml`
This files configures the build environment for FireSim. This tells the tools where to build designs, what base shell to use, and what designs to build.
First, we'll tell FireSim where to build our designs. Edit the `build-farm` section to resemble the following:
First, we'll tell FireSim where to build our designs. Edit the `build-farm` section to resemble the following:
This tells FireSim to place all of the build files in `/home/bxeuser/firesim/FIRESIM_BUILD_DIR` on the run farm hosts. You can change this to any location you'd like.
This tells FireSim to place all of the build files in `/home/bxeuser/firesim/FIRESIM_BUILD_DIR` on the run farm hosts. You can change this to any location you'd like.
Next we need to tell FireSim which designs we would like to build. `builds_to_run` lists all of the recipes that we'd like FireSim to build from scratch. Since we only want FireSim to build a `alveo_u250_firesim_rocket_dualcore_nic` recipe, we make sure we add it and comment out the other recipes. Here's what the `builds_to_run` section should look like:
Next we need to tell FireSim which designs we would like to build. `builds_to_run` lists all of the recipes that we'd like FireSim to build from scratch. Since we only want FireSim to build a `alveo_u250_firesim_rocket_dualcore_nic` recipe, we make sure we add it and comment out the other recipes. Here's what the `builds_to_run` section should look like:
```yaml
builds_to_run:
```yaml
# Configs for BXE
builds_to_run:
-alveo_u250_firesim_rocket_dualcore_nic
# Configs for BXE
```
-alveo_u250_firesim_rocket_dualcore_nic
```
In summation, your `$FIRESIM_ROOT/deploy/config_build.yaml` should look like this:
In summation, your `$FIRESIM_ROOT/deploy/config_build.yaml` should look like this:
```yaml
# Build-time build design / AGFI configuration for the FireSim Simulation Manager
```yaml
# See https://docs.fires.im/en/stable/Advanced-Usage/Manager/Manager-Configuration-Files.html for documentation of all of these params.
# Build-time build design / AGFI configuration for the FireSim Simulation Manager
# See https://docs.fires.im/en/stable/Advanced-Usage/Manager/Manager-Configuration-Files.html for documentation of all of these params.
# this refers to build farms defined in config_build_farm.yaml
# this refers to build farms defined in config_build_farm.yaml
# this refers to build farms defined in config_build_farm.yaml
build_farm:
# this refers to build farms defined in config_build_farm.yaml
Next we need add our `alveo_u250_firesim_rocket_dualcore_nic` to the list of FireSim hardware recipes. The recipe is what FireSim uses to tell Chipyard what to design to build, as well as any FPGA specific parameters. The top of the file has schema for all of the parameters available.
Next we need add our `alveo_u250_firesim_rocket_dualcore_nic` to the list of FireSim hardware recipes. The recipe is what FireSim uses to tell Chipyard what to design to build, as well as any FPGA specific parameters. The top of the file has schema for all of the parameters available.
Add the following to the end of `$FIRESIM_ROOT/deploy/config_build_recipes.yaml`:
Add the following to the end of `$FIRESIM_ROOT/deploy/config_build_recipes.yaml`:
We have now completed configuring FireSim. The `TARGET_CONFIG` section is the specific design in Chipyard we'd like to build. However, this design doesn't exist in Chipyard...
We have now completed configuring FireSim. The `TARGET_CONFIG` section is the specific design in Chipyard we'd like to build. However, this design doesn't exist in Chipyard...
## Creating a Design with Chipyard Mixins
Chipyard allows us to use their library of standard architecture and hardware components to build designs. These are called _Mixins_, and the list of components is out of scope for this tutorial. For now, we'll just use these to design a dual-core Rocket core.
## Creating a Design with Chipyard Mixins
Chipyard allows us to use their library of standard architecture and hardware components to build designs. These are called _Mixins_, and the list of components is out of scope for this tutorial. For now, we'll just use these to design a dual-core Rocket core.
Let's add our design to the list of designs available to FireSim. Open `$CHIPYARD_ROOT/generators/firechip/src/main/scala/TargetConfigs.scala` and add the following to the end of the file:
Let's add our design to the list of designs available to FireSim. Open `$CHIPYARD_ROOT/generators/firechip/chip/src/main/scala/TargetConfigs.scala` and add the following to the end of the file:
With the FireSim build environment and Chipyard design configured, we're ready to launch the build. With FireSim loaded into our environment (`source sourceme-manager.sh --skip-ssh-setup`), we can launch a build.
## Generating a Bitstream
With the FireSim build environment and Chipyard design configured, we're ready to launch the build. With FireSim loaded into our environment (`source sourceme-manager.sh --skip-ssh-setup`), we can launch a build.
```shell
cd$FIRESIM_ROOT
```shell
# source sourceme-manager.sh --skip-ssh-setup
cd$FIRESIM_ROOT
firesim buildbitstream
# source sourceme-manager.sh --skip-ssh-setup
```
firesim buildbitstream
```
As stated before, this may take **MANY HOURS** to complete. Grab yourself a cup of your favorite beverage and let the machine build. You should see the following successful build message when done:
As stated before, this may take **MANY HOURS** to complete. Grab yourself a cup of your favorite beverage and let the machine build. You should see the following successful build message when done:
Now that the build is complete, we need to tell FireSim that this design is available to be run. We'll add `alveo_u250_firesim_rocket_dualcore_nic` to FireSim's hardware database, then configure the simulation to use the new design.
# Running a Custom Design
Now that the build is complete, we need to tell FireSim that this design is available to be run. We'll add `alveo_u250_firesim_rocket_dualcore_nic` to FireSim's hardware database, then configure the simulation to use the new design.
## `$FIRESIM_ROOT/deploy/config_hwdb.yaml`
Using the path generated in the build step, we add an entry to the hardware database. Add the following to the end of the file:
## `$FIRESIM_ROOT/deploy/config_hwdb.yaml`
Using the path generated in the build step, we add an entry to the hardware database. Add the following to the end of the file:
Now we're ready to deploy this design in the simulation. We modify this file to tell FireSim what the target design we're going to simulate. In the `target_config` section, change the `default_hw_config` to point to our new design, `alveo_u250_firesim_rocket_dualcore_nic`. It should resemble this:
## `$FIRESIM_ROOT/deploy/config_runtime.yaml`
Now we're ready to deploy this design in the simulation. We modify this file to tell FireSim what the target design we're going to simulate. In the `target_config` section, change the `default_hw_config` to point to our new design, `alveo_u250_firesim_rocket_dualcore_nic`. It should resemble this:
In a separate window, log into the runner machine and run:
In a separate window, log into the runner machine and run:
```shell
screen -r fsim0
```shell
```
screen -r fsim0
```
Wait for the console to boot, then verify multiple cores in the booted simulation:
Wait for the console to boot, then verify multiple cores in the booted simulation:
```shell
# cat /proc/cpuinfo
```shell
processor : 0
# cat /proc/cpuinfo
hart : 1
processor : 0
isa : rv64imafdckph
hart : 1
mmu : sv39
isa : rv64imafdckph
uarch : sifive,rocket0
mmu : sv39
mvendorid : 0x0
uarch : sifive,rocket0
marchid : 0x1
mvendorid : 0x0
mimpid : 0x20181004
marchid : 0x1
mimpid : 0x20181004
processor : 1
hart : 0
processor : 1
isa : rv64imafdckph
hart : 0
mmu : sv39
isa : rv64imafdckph
uarch : sifive,rocket0
mmu : sv39
mvendorid : 0x0
uarch : sifive,rocket0
marchid : 0x1
mvendorid : 0x0
mimpid : 0x20181004
marchid : 0x1
```
mimpid : 0x20181004
```
Congratulations! You have now simulated a dual-core RISC-V Rocket Core and booted Linux on an FPGA! :champagne: :champagne: :champagne:
Congratulations! You have now simulated a dual-core RISC-V Rocket Core and booted Linux on an FPGA! :champagne: :champagne: :champagne:
# Building BlackBox Designs
Chipyard is capable of wrapping custom Verilog designs into a [BlackBox](https://chipyard.readthedocs.io/en/main/Customization/Incorporating-Verilog-Blocks.html). This allows you to use your custom Verilog designs as accelerators attached to the core, or as the core itself.
# Building BlackBox Designs
Chipyard is capable of wrapping custom Verilog designs into a [BlackBox](https://chipyard.readthedocs.io/en/main/Customization/Incorporating-Verilog-Blocks.html). This allows you to use your custom Verilog designs as accelerators attached to the core, or as the core itself.
FireSim has an example using a single-core [CVA6 RISC-V Verilog](https://chipyard.readthedocs.io/en/main/Generators/CVA6.html) implemenation.
FireSim has an example using a single-core [CVA6 RISC-V Verilog](https://chipyard.readthedocs.io/en/main/Generators/CVA6.html) implemenation.
---
---
[^1]:This research is based upon work supported by the Office of the Director of National Intelligence (ODNI), Intelligence Advanced Research Projects Activity (IARPA), through the Advanced Graphical Intelligence Logical Computing Environment (AGILE) research program, under Army Research Office (ARO) contract number D2021-2106030006. The views and conclusions contained herein are those of the authors and should not be interpreted as necessarily representing the official policies or endorsements, either expressed or implied, of the ODNI, IARPA, ARO, or the U.S. Government.
[^1]:This research is based upon work supported by the Office of the Director of National Intelligence (ODNI), Intelligence Advanced Research Projects Activity (IARPA), through the Advanced Graphical Intelligence Logical Computing Environment (AGILE) research program, under Army Research Office (ARO) contract number D2021-2106030006. The views and conclusions contained herein are those of the authors and should not be interpreted as necessarily representing the official policies or endorsements, either expressed or implied, of the ODNI, IARPA, ARO, or the U.S. Government.
[^2]:[Chipyard](https://chipyard.readthedocs.io/en/main/) is a framework for designing and evaluating full-system hardware using agile teams. It is composed of a collection of tools and libraries designed to provide an integration between open-source and commercial tools for the development of systems-on-chip.
[^2]:[Chipyard](https://chipyard.readthedocs.io/en/main/) is a framework for designing and evaluating full-system hardware using agile teams. It is composed of a collection of tools and libraries designed to provide an integration between open-source and commercial tools for the development of systems-on-chip.