@@ -300,7 +300,7 @@ Congratulations! You have now simulated a dual-core RISC-V Rocket Core and boote
# Building BlackBox Designs
Chipyard is capable of wrapping custom Verilog designs into a [BlackBox](https://chipyard.readthedocs.io/en/stable/Customization/Incorporating-Verilog-Blocks.html). This allows you to use your custom Verilog designs as accelerators attached to the core, or as the core itself.
FireSim has an example using a single-core [CVA6 RISC-V Verilog](https://chipyard.readthedocs.io/en/latest/Generators/CVA6.html) implemenation.
FireSim has an example using a single-core [CVA6 RISC-V Verilog](https://chipyard.readthedocs.io/en/stable/Generators/CVA6.html) implemenation.
